ELECTRICAL CHARACTERIZATION OF DIELECTRICALLY ISOLATED SILICON SUBSTRATES CONTAINING BURIED METALLIC LAYERS

Citation
Wl. Goh et al., ELECTRICAL CHARACTERIZATION OF DIELECTRICALLY ISOLATED SILICON SUBSTRATES CONTAINING BURIED METALLIC LAYERS, IEEE electron device letters, 18(5), 1997, pp. 232-234
Citations number
9
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
07413106
Volume
18
Issue
5
Year of publication
1997
Pages
232 - 234
Database
ISI
SICI code
0741-3106(1997)18:5<232:ECODIS>2.0.ZU;2-F
Abstract
Dielectrically isolated substrates containing buried highly conducting WSi2 layers are characterized for the first time using MOS capacitors , The active silicon layer is approximately 3 mu m thick with a buried WSi2 layer 120 mm thick adjacent to the isolation layer, The buried m etal forms the back contact of the capacitor and excellent MOS charact eristics are observed, Minority carrier lifetimes in excess of 200 mu s were measured indicating the suitability of these substrates for use in device manufacture.