SiO2 interface layer effects on microwave loss of high-resistivity CPW line

Citation
Yh. Wu et al., SiO2 interface layer effects on microwave loss of high-resistivity CPW line, IEEE MICR G, 9(1), 1999, pp. 10-12
Citations number
4
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE MICROWAVE AND GUIDED WAVE LETTERS
ISSN journal
10518207 → ACNP
Volume
9
Issue
1
Year of publication
1999
Pages
10 - 12
Database
ISI
SICI code
1051-8207(199901)9:1<10:SILEOM>2.0.ZU;2-H
Abstract
For a coplanar waveguide (CPW) line where the metal conductor is in direct contact with the HR-Si substrate, the microwave losses are low but are sens itive to de bias due to de leakage current. With a continuous SiO2 layer in serted between the CPW metallization and HR-Si substrate, de leakage is eli minated, but microwave losses increase, An MOS C-V analysis shows that an i nduced charge layer exists on the substrate surface and is the principle ca use for increased line losses. If the insulated SiO2 layer beneath the cond uctor strips of line is made to be noncontinuous, then microwave losses are decreased from 18 to 3 dB/cm at 30 GHz.