Floorplanning is an early phase in chip planning. It provides information o
n approximate area, delay, power, and other performance measures. Careful f
loorplanning is, thus, of extreme importance. In many applications, while a
good floorplan is needed, the information about all modules is not availab
le, or even worse, part of the provided information is inaccurate. Examples
of such applications are designing a huge system where the floorplan is ne
eded early in the design process, but not all the modules have been designe
d. Another example is the field of reconfigurable computing where it is not
known what modules will be needed on the reconfigurable chip as the progra
m is being executed. Floorplanning with uncertainty is the problem of obtai
ning a good floorplan when the information about module dimensions is not c
omplete, In this paper, the floorplanning problem with uncertainty is formu
lated, Correlation between input characteristics and output characteristics
is studied. Also, it is established that traditional floorplanners are inc
apable of efficiently handling uncertainty, An effective method for dealing
with uncertain data is proposed. Experiments show that, for example, with
up to 30% input uncertainty an area estimate with less than 7% error can be
obtained.