We describe a new family of clocked logic gates based on the resonant-tunne
ling diode (RTD). Pairs of RTD's from storage latches, and these are connec
ted by networks consisting of field-effect transistors (FET's), saturated r
esistors, and RTD's. The design, operation, and expected performance of bot
h a shift register and a matched filter using this logic ar-e discussed. Si
mulations show that the RTD circuits can achieve higher performance in term
s of speed and power in many signal processing applications. Compared to ci
rcuits using III-V FET's alone, the RTD circuits are expected to run nearly
twice as fast at the same power or at the same speed with reduced pou el.
Compared to circuits using Lincoln Laboratory's fully depleted silicon-on-i
nsulator CMOS, implementation using state-of-the-art RTD's should Operate f
ive times faster when both technologies follow the CMOS design rules.