A FAST PROGRAMMABLE TRIGGER FOR PATTERN-RECOGNITION

Citation
G. Gratta et al., A FAST PROGRAMMABLE TRIGGER FOR PATTERN-RECOGNITION, Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment, 400(2-3), 1997, pp. 456-462
Citations number
4
Categorie Soggetti
Nuclear Sciences & Tecnology","Physics, Particles & Fields","Instument & Instrumentation",Spectroscopy
ISSN journal
01689002
Volume
400
Issue
2-3
Year of publication
1997
Pages
456 - 462
Database
ISI
SICI code
0168-9002(1997)400:2-3<456:AFPTFP>2.0.ZU;2-O
Abstract
We have built a fast programmable trigger processor based on a state-o f-the-art Field Programmable Gate Array (FPGA) IC for the Pale Verde N eutrino Oscillation Experiment. The trigger processor can accommodate 160 ECL input signals, 8 NIM input signals, 16 ECL output signals and 8 NLM output signals. Our two-level trigger logic is designed asynchro nously to maximize speed. We have attained trigger times of 40 ns for level 1 and 100 ns far level 2 with 132 asynchronous inputs. The trigg er processor can be upgraded by replacing the FPGA with more advanced versions of tile chip as they appear.