INCREASED HOLE TRAPPING IN GATE OXIDES AS LATENT DAMAGE FROM PLASMA CHARGING

With aggressive device scaling and the wide use of plasma-assisted pro cesses, the device damage caused by process-induced charging is receiv ing growing attention, from both basic understanding and technological points of view. The paper presents results of hole-trapping studies i n the thin gate oxide of plasma-damaged NMOS and PMOS transistors. In addition to neutral electron traps and passivated interface damage, wh ich are commonly observed in plasma charging latent damage, we observe d and identified hole traps, generated by plasma stress. Enhanced hole trapping in the gate oxide of plasma-damaged devices was studied usin g Fowler-Nordheim stress and substrate hot-hole injection applied to a ntenna test structures sensitive to process-induced charging. The numb er of hole traps increases with increasing antenna ratio, indicating t hat the mechanism of hole-trap generation is based on electrical stres s and current flow, forced through the oxide due to charging under pla sma etching or ion implantation conditions.