A LOW-COST, INTERCHIP HBT BIAS REGULATION APPROACH FOR LOW-NOISE, HIGH IP3 RECEIVER ARCHITECTURES

A 9 to 21 GHz broadband, high third-order intercept point (IP3), heter ojunction bipolar transistor (HBT) balanced amplifier with monolithic current regulation is demonstrated in this article. The HBT balanced a mplifier MMIC also integrates four additional current regulators at th e input side of the chip in order to accommodate bias regulation of a preceding high electron mobility transistor (HEMT) low noise amplifier (LNA) MMIC. The octave-band HBT amplifier achieves 11 to 12 dB gain, an IP3 of 26.4 to 29.0 dBm and a noise figure of approximately 6.5 dB cross the 9 to 21 GHz band. The HBT chip is fully self biased through a 5 V supply and consumes a little over 100 mA of current. The current regulators consume eight percent of the total DC power of the MMIC. E ight current regulators and four HBT amplifier sections are integrated into a small 3.7 x 3.1 mm(2) area and result in at least a 20 times r eduction in size, and fewer components and wirebonds compared to a con ventional hybrid implementation. The HBT monolithic bias regulation ap proach focuses on a key HBT application that can significantly reduce the size and cost of modern integrated microwave receiver assemblies d esigned for commercial satellite communications.