A 120-MM(2) 64-MB NAND FLASH MEMORY ACHIEVING 180-NS BYTE EFFECTIVE PROGRAM SPEED/

Emerging application areas of mass storage Flash memories require low cost, high density Flash memories with enhanced device performance, Th is paper- describes a 64 Mb NAND Flash memory having improved read and program performances, A 40 MB/s read throughput is achieved by improv ing the page sensing time and employing the full-chip burst read capab ility, A 2-mu s random access time is obtained by using a precharged c apacitive decoupling sensing scheme with a staggered row decoder schem e, The full-chip burst read capability is realized by introducing a ne w array architecture. A narrow incremental step pulse programming sche me achieves a 5 MB/s program throughput corresponding to 180 ns/Byte e ffective program speed, The chip has been fabricated using a 0.4-mu m single-metal CMOS process resulting in a die size of 120 mm(2) and an effective cell size of 1.1 mu m(2).