We present experimental measurements of charge collection spectroscopy
from high energy ion strikes in submicron CMOS/SOI devices. Due to th
e specific structure of SOI technology, with symmetrical source and dr
ain junctions, a direct equivalence between upset mechanism and charge
collection is established. The bipolar mechanism, responsible for the
amplification of the deposited charge is discussed based on 2D device
simulations. Based on the experimental data we determine qualitativel
y the influence of transistor geometry on the bipolar gain. Finally th
e limits of the usual SEU concepts (LET threshold and cross section) a
re discussed for scaled devices.