SEU DESIGN CONSIDERATIONS FOR MESFETS ON LT GAAS

Authors
WEATHERFORD TR RADICE R ESKINS D DEVERS J FOUTS DJ MARSHALL PW MARSHALL CJ DIETRICH H TWIGG M MILANO R
Citation
Tr. Weatherford et al., SEU DESIGN CONSIDERATIONS FOR MESFETS ON LT GAAS, IEEE transactions on nuclear science, 44(6), 1997, pp. 2282-2289
Citations number
14
Categorie Soggetti
Nuclear Sciences & Tecnology","Engineering, Eletrical & Electronic
Journal title
IEEE transactions on nuclear science → ACNP
ISSN journal
00189499
Volume
44
Issue
6
Year of publication
1997
Part
1
Pages
2282 - 2289
Database
ISI
SICI code
0018-9499(1997)44:6<2282:SDCFMO>2.0.ZU;2-X
Abstract
Computer simulation results are reported on transistor design and sing le-event charge collection modeling of metal-semiconductor field effec t transistors (MESFETs) fabricated in the Vitesse H-GaAsIII(R) process on Low Temperature grown (LT) GaAs epitaxial layers. Tradeoffs in Sin gle Event Upset (SEU) immunity and transistor design are discussed. Ef fects due to active loads and diffusion barriers are examined.