ONLINE DETECTION OF BRIDGING AND DELAY FAULTS IN FUNCTIONAL BLOCKS OFCMOS SELF-CHECKING CIRCUITS

This paper investigates the detection of parametric bridging and delay faults affecting the functional block of CMOS self-checking circuits (SCC's). As far as these faults are concerned, classical definitions a re shown to become ambiguous because they are entirely based on logic considerations. Thus, new definitions are proposed here to consider th e analog and dynamic effects of such faults, and to ensure that they d o not produce any problem at the system level. Moreover, electrical le vel design rules aimed at satisfying these conditions are proposed for self-checking circuits with combinational functional blocks. The prob lem of their practicability and effectiveness is analyzed in detail, a nd is shown by means of significant examples.