AN ANALYSIS OF FRAME SYNCHRONIZATION SYSTEMS WITH RACING COUNTERS ANDMAJORITY-RULE FOR M-ARY SS COMMUNICATION-SYSTEMS/

In this paper, a simple frame synchronization system for M-ary Spread Spectrum (M-ary/SS) communication systems is analyzed, In particular, synchronization performance, bit error rate performance, and Spread Sp ectrum Multiple Access (SSMA) performance are analyzed. The frame sync hronization system uses the racing counters. The transmitted signal co ntains framing chips that are added to spreading sequences. In the rec eiver, the framing chips are detected from several frames. The authors have proposed the simple Frame synchronization system that detects fr aming chips from consecutive 2 frames. In this system, as the number o f framing chips increases, synchronization performance improves and bi t error rate performance degrades. In this paper a frame synchronizati on system that improves bit error rate performance is treated and anal yzed. As the result, when the number of reference frames is 3, the bit error rate is much improved than the conventional system.