A SMARTER-CUT APPROACH TO LOW-TEMPERATURE SILICON LAYER TRANSFER

Silicon wafers were first implanted at room temperature by B+ with 5.0 x 10(12) to 5.0 x 10(15) ions/cm(2) at 180 keV, and subsequently impl anted by H-2(+) with 5.0 x 10(16) ions/cm(2) at an energy which locate s the H-peak concentration in the silicon wafers at the same position as that of the implanted boron peak. Compared to the H-only implanted samples, the temperature for a B+H coimplanted silicon layer to split from its substrate after wafer bonding during a heat treatment for a g iven time is reduced significantly. Further reduction of the splitting temperature is accomplished by appropriate prebonding annealing of th e B+H coimplanted wafers. Combination of these two effects allows the transfer of a silicon layer from a silicon wafer onto a severely therm ally mismatched substrate such as quartz at a temperature as low as 20 0 degrees C. (C) 1998 American Institute of Physics.