BIAS OPTIMIZATION FOR SWITCHED-CAPACITOR AMPLIFIERS

Bias optimization is one of the most important design issues in many l ow power applications. Several biasing schemes for switched capacitor applications are analyzed in this paper from the settling time point o f view. A bias circuit is described that provides the best tradeoff be tween the slew-rate and the unity gain bandwidth of a single dominant- pole opamp over process and temperature variations. Theoretical analys is and simulations confirm a quasi-constant settling time with minimal process dependence.