SIMPLIFIED QUATERNARY SIGNED-DIGIT ARITHMETIC AND ITS OPTICAL IMPLEMENTATION

A simplified two-step quaternary signed-digit addition algorithm is pr esented. In contrast to the previously reported techniques using a lar ge number of six-variable or four-variable minterms, the proposed algo rithm requires only 10 minterms in the first step and 6 minterms in th e second step. Furthermore, our scheme uses only two variables for eac h minterm. Therefore, the information to be stored is greatly reduced and the system complexity is decreased. With a shared-content-addressa ble memory (SCAM), it needs to store only one set of minterms independ ent of the operand length, and consequently, the system size does not increase with the increase of the operand digits. For optical implemen tation, an incoherent correlator based SCAM processor unit can be used to perform the two-step addition. The unit is very simple, easy to al ign and implement, and insensitive to the environment. An experimental result is given.