A SEQUENTIAL QUADRATIC-PROGRAMMING APPROACH TO CONCURRENT GATE AND WIRE SIZING

With an ever-increasing portion of the delay in highspeed CMOS chips a ttributable to the interconnect, interconnect-circuit design automatio n continues to grow in importance, By transforming the gate and multil ayer wire sizing problem into a convex programming problem for the Elm ore delay approximation, we demonstrate the efficacy of a sequential q uadratic programming (SQP) solution method, For cases where accuracy g reater than that provided by the Elmore delay approximation is require d, we apply SQP to the gate and wire sizing problem with more accurate delay models, Since efficient calculation of sensitivities is of para mount importance during SQP, we describe an approach for efficient com putation of the RC circuit delay sensitivities.