DIAGNOSIS OF CMOS OP-AMPS WITH GATE OXIDE SHORT FAULTS USING MULTILAYER PERCEPTRONS

Citation
S. Yu et al., DIAGNOSIS OF CMOS OP-AMPS WITH GATE OXIDE SHORT FAULTS USING MULTILAYER PERCEPTRONS, IEEE transactions on computer-aided design of integrated circuits and systems, 16(8), 1997, pp. 930-935
Citations number
28
ISSN journal
02780070
Volume
16
Issue
8
Year of publication
1997
Pages
930 - 935
Database
ISI
SICI code
0278-0070(1997)16:8<930:DOCOWG>2.0.ZU;2-Z
Abstract
CMOS operational amplifier transistors containing a single gate oxide short (GOS) fault between the source and drain were diagnosed from SPI CE simulations of the supply current responses la ramp and sinusoidal test stimuli, Multilayer perceptron (MLP) artificial neural networks w ere trained to classify the faulty transistors from the responses. Fun ctional testing did not always reveal the GOS's so this method offers reliability testing against future failure since the GOS's can deterio rate during operation of the circuit. The GOS's were modeled by a diod e and series resistance at various distances from the source. The brea kdown voltages of the model diode significantly affected the responses and diagnostic accuracies. If they are in the expected practical rang e (less than or equal to 2V) and are uniform in value, then bg combini ng test results from both stimuli, accuracies of 100% are obtainable, If their values are variable or higher, the accuracies decrease, and t he test reduces to a go/no go test. No test pins are required so the m ethod is applicable to any circuit.