This paper describes 0.15 mu m electron beam (EB) direct writing techn
iques for Gbit dynamic random access memory (DRAM) fabrication. In ord
er to use EB direct writing for reliable fine pattern fabrication on t
he 0.15 mu m level, an EB direct writing system technique, a resist pr
ocess technique, a cell projection (CP) mask preparation technique, wh
ich is indispensable for improving the writing throughput, and a data
preparation technique with proximity effect correction must be improve
d respectively and combined successfully. The proximity effect correct
ion for all fine patterns in a full-scale DRAM chip is especially impo
rtant for achieving a CD accuracy of less than 0.02 mu m, which is req
uired for device fabrication and margin. For obtaining the reliable sh
ot stitching accuracy between CP and variably shaped (VS) EB writings,
we adopted the cross-correlation method, which was used to decide the
size and center position of the CP shot. A single-layer resist system
without an over-coated conducting layer was used for reliable device
fabrication. In addition, for improving the CD accuracy for all 0.15 m
u m designed patterns in a full-scale chip, we developed a data partit
ion process suitable for CP mask pattern data and an improved 1-dimens
hinal(1-D) calculation method for proximity effect correction. Utilizi
ng these techniques, the full-scale 4Gbit DRAM, which was designed wit
h 0.15 mu m minimum feature size, was fabricated successfully with 0.0
5 mu m (\mean\ + 3 sigma) overlay accuracy, 0.02 mu m (\mean + 3 sigma
) stitching accuracy, and less than 0.02 mu m (3 sigma) CD accuracy, a
ll of which were sufficient for the required device fabrication.