BURIED, SELF-ALIGNED BARRIER LAYER STRUCTURES FOR PEROVSKITE-BASED MEMORY DEVICES COMPRISING PT OR IR BOTTOM ELECTRODES ON SILICON-CONTRIBUTING SUBSTRATES

The integration of noble metal electrodes into semiconductor memory de vices incorporating ferroelectric or high dielectric constant epsilon materials is expected to require deposition of a conductive, oxidation -resistant barrier material between the noble metal and the silicon co ntact. Described is an alternative type of barrier layer structure whi ch is formed as buried, self-aligned layer during oxygen-ambient annea ling after noble metal deposition on silicon-contributing substrates. Reactions of Pt(20 nm) and Ir(20 nm) films with substrates of single c rystalline silicon (c-Si), polycrystaline silicon (poly-Si), and tungs ten silicide (WSix/Si with x = 2.4-2.8) were examined after anneals in atmospheric pressure ambients of oxygen or nitrogen at temperatures o f 640-700 degrees C, a temperature range of interest for high-epsilon materials deposition. While Pt(20 nm) films reacted with silicon and W Six/Si during oxygen annealing to form a mixture of Pt silicides and P t, Ir(20 nm) films on the same substrates did not form any iridium sil icides during oxygen annealing. In all cases, unreacted noble metal M was left due to the formation of an oxygen-containing M-O-Si barrier w hich interfered with the silicidation reaction. In contrast to these r esults for oxygen annealing, the Pt and Ir films were completely consu med by silicidation reactions during anneals in nitrogen. Qualitative through-film resistance measurements indicated that the M-O-Si barrier layers formed during oxygen annealing were at least moderately conduc tive for the cases of M = Ir on silicon and M = Ir or Pt on WSi2.8(300 nm)/Si, a prerequisite for the use of these electrode barrier structu res in high-density dynamic random access memory. (C) 1998 American In stitute of Physics. [S0021-8979(98)03902-4].