T. Serranogotarredona et B. Linaresbarranco, A HIGH-PRECISION CURRENT-MODE WTA-MAX CIRCUIT WITH MULTICHIP CAPABILITY, IEEE journal of solid-state circuits, 33(2), 1998, pp. 280-286
This paper presents a circuit design technique suitable for the realiz
ation of winner-take-all (WTA), maximum (MAX), looser-take-all (LTA),
and minimum (MIN) circuits, The technique presented is based on curren
t replication and comparison, Traditional techniques rely on the match
ing of an N transistors array, where N is the number of system inputs,
This implies that when N increases, as the size of the circuit and th
e distance between transistors will also increase, transistor matching
degradation and loss of precision in the overall system performance w
ill result, Furthermore, when multichip systems are required, the tran
sistor matching is even worse and performance is drastically degraded,
The technique presented in this paper does not rely on the proper mat
ching of N transistors, but on the precise replication and comparison
of currents, This can be performed by current mirrors with a limited n
umber of outputs. Thus, N can increase without degrading the precision
, even if the system is distributed among several chips, Also, the dif
ferent chips constituting the system can be of different foundries wit
hout degrading the overall system precision. Experimental results that
attest these facts are presented.