A novel silicon retina chip based on the information processing in the
vertebrate retina was designed and fabricated, The chip has a novel w
iring structure in which all pixels are connected through the channel
of MOS transistors, which simplifies a wiring structure compared with
conventional resistive networks, The proposed structure minimizes the
pixel area and certainly increases a fill factor since each pixel cons
ists of only two photodiodes and three MOS transistors, Experimental r
esults showed that the chip could extracted the edge of input images s
uccessfully, Furthermore, it was shown that the chip could operate ove
r a wide range of light intensities by adjusting its spatial resolutio
n.