NEURON-MOS V-T CANCELLATION CIRCUIT AND ITS APPLICATION TO A LOW-POWER AND HIGH-SWING CASCODE CURRENT MIRROR

Citation
K. Tanno et al., NEURON-MOS V-T CANCELLATION CIRCUIT AND ITS APPLICATION TO A LOW-POWER AND HIGH-SWING CASCODE CURRENT MIRROR, IEICE transactions on fundamentals of electronics, communications and computer science, E81A(1), 1998, pp. 110-116
Citations number
12
Categorie Soggetti
Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture","Computer Science Information Systems
ISSN journal
09168508
Volume
E81A
Issue
1
Year of publication
1998
Pages
110 - 116
Database
ISI
SICI code
0916-8508(1998)E81A:1<110:NVCCAI>2.0.ZU;2-W
Abstract
In this paper, a threshold voltage (V-T) cancellation circuit for neur on-MOS (nu MOS) analog circuits is described. By connecting the output terminal of this circuit with one of the input terminals of the nu MO S transistor, cancellation of V-T is realized. The circuit has advanta ges of ground-referenced output and is insensitive to the fluctuation of bias and supply voltages. Second-order effects. such as the channel length modulation effect, the mobility reduction effect and device mi smatch of the proposed circuit are analyzed in detail. Low-power and h igh swing nu MOS cascode current mirror is presented as an application . Performance of the proposed circuits is confirmed by HSPICE simulati on with MOSIS 2.0 mu p-well double-poly and double-metal CMOS device p arameters.