MOMENT-BASED TECHNIQUES FOR RLC CLOCK TREE CONSTRUCTION

While designing interconnect for MCM's, one must take into considerati on the distributed RLC effects, due to which signals may display nonmo notonic behavior and substantial ringing, This paper considers the pro blem of designing clock trees for MCM's, A fully distributed RLC model is utilized for AWE-based analysis and synthesis, and appropriate mea sures are taken to ensure adequate signal damping and for buffer inser tion to satisfy constraints on the clock signal slew rate. Experimenta l results; verified by SPICE simulations, show that this method can be used to build clock trees with near-zero skews, Computational efficie ncy along with its accuracy make this method ideal for computer-aided design (CAD) of RLC clock trees.