SYSTEM ARCHITECTURE OF AN ADAPTIVE RECONFIGURABLE DSP COMPUTING ENGINE

Modern digital signal processing (DSP) applications call for computati onally intensive data processing at very high data rates. In order to meet the high-performance/low-cost constraints, the state-of-the-art v ideo processor should be a programmable design which performs various tasks in video applications without sacrificing the computational powe r and the manufacturing cost in exchange for such flexibility. Current ly, general-purpose programmable DSP processor and application-specifi c integrated circuit (ASIC) design are the two major approaches for da ta processing in practical implementations. In order to meet the high- speed/low-cost constraint, it is desirable to have a programmable desi gn that has the flexibility of the general-purpose DSP processor while the computational power is similar to ASIC designs. In this paper, we present the system architecture of an adaptive reconfigurable DSP com puting engine for numerically intensive front-end audio/video communic ations. The proposed system is a massively parallel architecture that is capable of performing most low-level computationally intensive data processing including finite impulse response/infinite impulse respons e (FIR/IIR) filtering, subband filtering, discrete orthogonal transfor ms (DT), adaptive filtering, and motion estimation for the host proces sor in DSP applications. Since the properties of each programmed funct ion such as parallelism and pipelinability have been fully exploited i n this design, the computational speed of this computing engine can be as fast as ASIC designs that are optimized for individual specific ap plications. We also show that the system can be easily configured to p erform multirate FIR/IIR/DT operations at negligible hardware overhead . Since the processing elements are operated at half of the input data rate, we are able to double the processing speed on-the-fly based on the same system architecture without using high-speed/full-custom circ uits. The programmable/high-speed features of the proposed design make it very suitable for cost-effective video-rate DSP applications.