DESIGN VERIFICATION OF THE S3.MP CACHE-COHERENT SHARED-MEMORY SYSTEM

Authors
PONG F BROWNE M AYBAY G NOWATZYK A DUBOIS M
Citation
F. Pong et al., DESIGN VERIFICATION OF THE S3.MP CACHE-COHERENT SHARED-MEMORY SYSTEM, I.E.E.E. transactions on computers, 47(1), 1998, pp. 135-140
Citations number
21
Categorie Soggetti
Computer Science Hardware & Architecture","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
Journal title
I.E.E.E. transactions on computers → ACNP
ISSN journal
00189340
Volume
47
Issue
1
Year of publication
1998
Pages
135 - 140
Database
ISI
SICI code
0018-9340(1998)47:1<135:DVOTSC>2.0.ZU;2-S
Abstract
This paper describes the methods used to formulate and validate the me mory subsystem of the cache-coherent Sun Scalable Shared-memory MultiP rocessor (S3.mp) at three levels of abstraction: the memory consistenc y model, the cache coherence protocol, and the implementation.