COMPLETION-DETECTION TECHNIQUE FOR DYNAMIC LOGIC

Authors
BARTLETT VA GRASS E
Citation
Va. Bartlett et E. Grass, COMPLETION-DETECTION TECHNIQUE FOR DYNAMIC LOGIC, Electronics Letters, 33(22), 1997, pp. 1850-1852
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
33
Issue
22
Year of publication
1997
Pages
1850 - 1852
Database
ISI
SICI code
0013-5194(1997)33:22<1850:CTFDL>2.0.ZU;2-5
Abstract
A completion-detection technique is introduced for bundled-data asynch ronous systems implemented in single-rail dynamic CMOS logic. Its appl ication to a carry-ripple adder is presented showing significant benef its in terms of performance and area overhead.