CHARGE INJECTION ERROR REDUCTION CIRCUIT FOR SWITCHED-CURRENT SYSTEMS

Citation
P. Riffaud et al., CHARGE INJECTION ERROR REDUCTION CIRCUIT FOR SWITCHED-CURRENT SYSTEMS, Electronics Letters, 33(20), 1997, pp. 1689-1691
Citations number
3
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
00135194
Volume
33
Issue
20
Year of publication
1997
Pages
1689 - 1691
Database
ISI
SICI code
0013-5194(1997)33:20<1689:CIERCF>2.0.ZU;2-7
Abstract
The authors propose a novel circuit for reducing the charge injection error based on the technique of current source replication, applied to a second generation memory cell. Using the proposed circuit, offset e rror, linear gain error, and total harmonic distortion are significant ly reduced to the detriment of the occupied die area and the power dis sipation, which are multiplied by a factor of three.