INDIRECTLY-COMPARED CACHE TAG MEMORY USING A SHARED TAG IN A TLB

Authors
LEE YW LEE TY AN SJ LEE YS
Citation
Yw. Lee et al., INDIRECTLY-COMPARED CACHE TAG MEMORY USING A SHARED TAG IN A TLB, Electronics Letters, 33(21), 1997, pp. 1764-1766
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Electronics Letters → ACNP
ISSN journal
00135194
Volume
33
Issue
21
Year of publication
1997
Pages
1764 - 1766
Database
ISI
SICI code
0013-5194(1997)33:21<1764:ICTMUA>2.0.ZU;2-N
Abstract
A shared tag by which both translation lookaside buffers (TLBs) and ca ches can be accessed is presented. This architecture reduces the chip area of conventional cache tags and also improves the speed of cache s ystems. To validate the proposed architecture, the authors measured bo th the area and speed based on VLSI circuits.