NUMERICAL MODELING OF A CLOCK DISTRIBUTION NETWORK FOR A SUPERCONDUCTING MULTICHIP-MODULE

As supercomputers continue to move toward more powerful processors and parallelization, fast switching structures to route data signals betw een processors and shared memory become essential, and in fact, may be a primary limiting factor in overall computational throughput, The fa st switching network under consideration in this paper is a crossbar s witch employing superconducting Josephson Junction (JJ) and multichip module (MCM) technologies. This paper focuses on the design and simula tion of the clock distribution network, located within the MCM, that w ill provide the necessary timing mechanism for data signals traveling through the crossbar switch.