A MICROPOWER CMOS, DIRECT-CONVERSION, VLF RECEIVER CHIP FOR MAGNETIC-FIELD WIRELESS APPLICATIONS

A micropower CMOS, direct-conversion very low frequency (VLF) receiver is described for receiving low-level magnetic fields from resonant se nsors. The single-chip, phase locked loop (PLL)-synthesized receiver c overs a frequency range of 10-82 kHz and provides both analog and 9-b digital baseband I and Q outputs. Digital I and Q outputs are accumula ted in a companion digital chip which provides baseband signal process ing. Emphasis is placed on the receiver micropower RF preamplifier whi ch uses a lateral bipolar input device because of the significant incr ease in flicker noise illustrated for PMOS devices in weak inversion. Lateral bipolar transistors are also utilized in the mixer and IF stag es for low flicker noise and low dc offsets. Special attention is give n to isolating the internal local oscillator signals from the low-leve l RF input (0.3 mu V noise floor in 300 Hz BW), and local oscillator f eedthrough is indiscernible in the RF preamplifier output noise spectr um. The 100% duty-cycle receiver, intended for miniature, battery-oper ated wireless applications, operates approximately four months at 80 m u A from a 6-V, 220-mA-hr battery.