A 25 MS S 8-B 10 MS/S 10-B CMOS DATA-ACQUISITION IC FOR DIGITAL STORAGE OSCILLOSCOPES/

A data acquisition IC has been developed for digital storage oscillosc opes (DSO's). The entire DSO front-end except an input attenuator was integrated using 1-mu m double-poly, double-metal (DPDM) CMOS process technology. In the analog-to-digital conversion, a time-interleaved su ccessive approximation architecture effectively enables both 25 Ms/s 8 -b and 10 Ms/s 10-b operation. The input signal conditioner consists o f a variable gain amplifier (VGA)and a second-order programmable low-p ass filter (LPF) using folded-cascode structures with current feedback circuits. The overall gain is externally controllable from 12 dB to 3 8 dB, and the bandwidth is programmable at 500 kHz, 5 MHz, and 25 MHz. The chip consumes 340 mW at the 25 Ms/s operating condition and less than 8 mW in the power-down mode from a single 5-V supply.