This paper presents an account of two tools which enable realistic par
allel performance estimates to be obtained in reasonable time. The fir
st tool, PERFORM (performance estimator for RISC microprocessors), is
a general purpose package for sequential program performance estimatio
n on modem RISC microprocessor nodes with complex memory hierarchies,
The novelty of the tool is that we have chosen an intermediate level o
f abstraction between simple statement counting and full simulation of
the node architecture. The second tool, LEBEP, generates synthetic pa
rallel programs from a simple communication specification. In particul
ar, it can rate communication operations that incurs typical communica
tion overhead, including data movements across different levels in the
memory hierarchy.