A HIGHLY RELIABLE FRAME-RELAY SWITCHING NODE ARCHITECTURE BASED ON ATM SWITCHING TECHNOLOGY

Citation
K. Noguchi et al., A HIGHLY RELIABLE FRAME-RELAY SWITCHING NODE ARCHITECTURE BASED ON ATM SWITCHING TECHNOLOGY, IEICE transactions on communications, E81B(2), 1998, pp. 315-323
Citations number
3
Categorie Soggetti
Engineering, Eletrical & Electronic",Telecommunications
ISSN journal
09168516
Volume
E81B
Issue
2
Year of publication
1998
Pages
315 - 323
Database
ISI
SICI code
0916-8516(1998)E81B:2<315:AHRFSN>2.0.ZU;2-K
Abstract
Local Area Networks(LANs)are now being used all over the world. The ne ed for cost-effective and high-speed communication services, such as L AN interconnections and large-volume file transfer of all types of dat a is rapidly increasing, At the same time, Internet services are sprea ding rapidly, and we'll soon see the construction of a cost-effective open computer network (OCN). Frame-relay and cell-relay technologies w hich can achieve higher-speed and higher-performance switching than pa cket switching, are therefore attracting much attention. Frame-relay t echnologies are also important because they provide an infrastructure for high-speed data communication as fast as 1.5 Mbit/sec. Demand for these frame-relay network services have been increasing rapidly. We pr opose a cost-effective and highly reliable node architecture that we h ave developed at NTT. Our basic concept for this is based on the ail-b and switching node architecture which can provide both STM and ATM swi tches on the same hardware and software platforms, and can accommodate any type of node, such as STM nodes, and ATM nodes for B-ISDN. Our pr oposed architecture forms highly reliable frame-relay network infrastr ucture. By using a scale-flexibility building-block architecture, we c an construct a small-scale node and a large-scale node cost-effectivel y. Next, the key technologies of highly reliable node architecture are presented. These are methods of changing over following function-unit s without frame-loss and/or cell-loss. We present two examples: frame- relay protocol processing units (PPUs) with an N+M-redundant architect ure that consists of a number of acting PPUs(ACT) and a number of stan dby PPUs (SBY)waiting to become active, and duplicate ATM Mux/DemuX bl ocks(ATM MDXs)with a cell shaping buffer.