A DELAY AND LOSS VERSATILE SCHEDULING DISCIPLINE IN ATM SWITCHES

In this paper, we propose a versatile scheduling discipline, called Pr ecedence with Partial Push-out (PPP), in Asynchronous Transfer Mode (A TM) switches supporting two delay sand two loss priorities. By employi ng a threshold L, the PPP discipline provides delay guarantee by allow ing a newly-arriving high-delay-priority cell to precede a maximum of L, few-delay-priority cells. Through the use of another threshold R, t he discipline offers loss guarantee by permitting a newly-arriving hig h-loss-priority cell to push out the last low-loss-priority cell locat ed beyond the R-th location in a full queue. By setting L and R proper ly, PPP versatilely performs as any one of the four widely-accepted di sciplines, namely, the FCFS, head-of-line, push-out, or head-of-line w ith push-out disciplines. For precisely determining L and R retaining demanded Quality of Services (QoSs), we provide an in-depth queueing a nalysis for the Cell Delay (CD) and Cell Loss Ratio (CLR) of high-dela y-priority, low-loss-priority cells. We further propose a simple, alge bra-based analysis for the CD and CLR of low-delay-priority, high-loss -priority cells. On the basis of these analyses, L and R can be dynami cally and effectively adjusted to provide adequate delay and loss guar antees for high-priority cells while incurring only minimal performanc e degradation for other classes of cells. Finally, the paper presents simulation results confirming the accuracy of the analyses.