This article demonstrates the industrial feasibility of single-wafer C
VD for key advanced BiCMOS (less than or equal to 0.35 mu m) and CMOS
(less than or equal to 0.18 mu m) processing steps. In situ As-doped a
morphous silicon layers improve electrical performance in BICMOS devic
es with a reduced number of process steps. We demonstrate reproducible
stacked layers of poly-Si1-xGex/Si with Ge contents ranging from 0-10
0% and test the electrical behavior of this new gate material in 0.18-
mu m CMOS devices.