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The implementation of a versatile VLSI chip certainly represents an im
portant step to improve the research on Cellular Neural Networks. In t
his paper a VLSI realization of the multi-chip oriented, the 6 x 6 Dig
itally Programmable Cellular Neural Network (6 x 6DPCNN) chip, will be
presented. This chip covers most of the available one-neighbourhood t
emplates for image processing applications. Moreover, it can be easily
interconnected to others to carry out very large CNN arrays. The desi
gns and some measured results of a single chip and a multi-chip board
(the 720 DPCNN System) will be shown.