A COMPACT 3V, 70MW, 12-BIT VIDEO-SPEED CMOS ADC

Authors
OSTREM GS MOLDSVOR O AASERUD O
Citation
Gs. Ostrem et al., A COMPACT 3V, 70MW, 12-BIT VIDEO-SPEED CMOS ADC, Analog integrated circuits and signal processing, 15(1), 1998, pp. 27-36
Citations number
11
Categorie Soggetti
Computer Science Hardware & Architecture","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
Journal title
Analog integrated circuits and signal processing → ACNP
ISSN journal
09251030
Volume
15
Issue
1
Year of publication
1998
Pages
27 - 36
Database
ISI
SICI code
0925-1030(1998)15:1<27:AC371V>2.0.ZU;2-I
Abstract
A 12-bit video speed pipelined switched capacitor analog-to-digital co nverter (ADC) has been implemented in a 0.5 mu m standard CMOS process . It operates from a single 2.6-3.3V supply, dissipates 23mA (independ ent of supply voltage) at 20 MSPS and occupies only 1.1mm(2). A 61dB S INAD (f(in) = 4.5 MHz) and an effective resolution bandwidth of 9 MHz is achieved.