MULTIBIT CASCADE SIGMA-DELTA MODULATOR FOR HIGH-SPEED A D CONVERSION WITH REDUCED SENSITIVITY TO DAC ERRORS/

Citation
F. Medeiro et al., MULTIBIT CASCADE SIGMA-DELTA MODULATOR FOR HIGH-SPEED A D CONVERSION WITH REDUCED SENSITIVITY TO DAC ERRORS/, Electronics Letters, 34(5), 1998, pp. 422-424
Citations number
8
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
00135194
Volume
34
Issue
5
Year of publication
1998
Pages
422 - 424
Database
ISI
SICI code
0013-5194(1998)34:5<422:MCSMFH>2.0.ZU;2-W
Abstract
The authors present a Sigma Delta modulator (Sigma Delta M) which comb ines single-bit and multi-bit quantisation in a cascade architecture t o obtain high resolution with a low oversampling ratio. It is less sen sitive to the nonlinearity of the digital-to-analogue (DAC) than those previously reported, thus enabling the use of very simple analogue ci rcuitry with neither calibration nor trimming required.