A TRANSISTORLESS-CURRENT-MODE STATIC RAM ARCHITECTURE

We propose a static memory architecture in which each bit consists of a single tmo-terminal device that is bistable in current, Current-mode operation of the memory array removes the need for cell-isolation tra nsistors, thus, allowing huge increases in density over inverter-based SRAM and capacitor-based DRAM. Low pou er consumption and fast read/w rite speeds are ensured by taking advantage of the exponential nature of the memory's current-voltage characteristic.