ON THE REPRESENTATION OF STATIC HYSTERESIS CURVES BY A PWL LADDER CIRCUIT

Citation
M. Storace et M. Parodi, ON THE REPRESENTATION OF STATIC HYSTERESIS CURVES BY A PWL LADDER CIRCUIT, International journal of circuit theory and applications, 26(2), 1998, pp. 167-177
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00989886
Volume
26
Issue
2
Year of publication
1998
Pages
167 - 177
Database
ISI
SICI code
0098-9886(1998)26:2<167:OTROSH>2.0.ZU;2-L
Abstract
Some important features of static hysteretic phenomena can be suitably represented by a recently proposed ladder circuit model. The elementa ry cell of this ladder is constituted by a linear capacitor and a non- linear resistor with a proper piecewise linear (PWL) characteristic. W ith respect to the original formulation, the representation capabiliti es of the model can be improved by introducing proper generalizations. These generalizations concern the definition of the hysteretic (outpu t) variable and the initial states of the circuit capacitors. After in troducing these concepts, this paper addresses the determination of th e model parameters that give the best fit of the experimental data of a scalar rate-independent hysteresis. The solution of this identificat ion problem is obtained both for a limit cycle and for a cycle togethe r with its first polarization curve. (C) 1998 John Wiley & Sons, Ltd.