ONLINE TESTING FOR VLSI - A COMPENDIUM OF APPROACHES

This paper presents an overview of a comprehensive collection of on-li ne testing techniques for VLSI. Such techniques are for instance: self -checking design, allowing high quality concurrent checking by means o f hardware cost drastically lower than duplication; signature monitori ng, allowing low cost concurrent error detection for FSMs; on-line mon itoring of reliability relevant parameters such as current, temperatur e, abnormal delay, signal activity during steady state, radiation dose , clock waveforms, etc.; exploitation of standard BIST, or implementat ion of BIST techniques specific to on-line testing (Transparent BIST, Built-In Concurrent Self-Test,...); exploitation of scan paths to tran sfer internal states for performing various tasks for on-line testing or fault tolerance; fail-safe techniques for VLSI, avoiding complex fa il-safe interfaces using discrete components; radiation hardened desig ns, avoiding expensive fabrication process such as SOI, etc.