SPLIT-LOT DESIGNS - EXPERIMENTS FOR MULTISTAGE BATCH PROCESSES

The fabrication of integrated circuits (IC's) is accomplished through a vast sequence of processing steps. Moreover, the silicon wafers on w hich the IC's are produced move through the process in lots of size 24 or more. Although some processing steps are applied to individual waf ers, for other steps several wafers (or even several lots) are process ed simultaneously as a group. To facilitate experimentation with such a multistage batch process, ''split-lot'' experimental designs are att ractive because they allow the experimental wafers to be split into su blets for processing. The designs are obtained by using different sets of factorial effects to define the composition of the sublets at each step. Specific examples are given with up to nine processing steps. A split-lot design balances the way in which the wafers are repartition ed at each stage in the experiment. Taguchi refers to such experiments as multiway split-unit designs. Two-way split-unit experiments arise naturally in agriculture, where some factors are assigned to rows and other factors to columns in a field. The term ''strip plot,'' which or iginated in this agricultural context, remains in common usage when th e experiment involves only two processing steps. Although semiconducto r fabrication motivated our interest in these designs, their applicabi lity includes any industry with batch processing of discrete units.