A 32 X 32-B ADIABATIC REGISTER FILE WITH SUPPLY CLOCK GENERATOR

A 32 x 32-b adiabatic register file with one read port and one write p ort is designed, A four-phase clock generator is also designed to prov ide supply clocks for adiabatic circuits, All the word line and bit li ne charge on the capacitive interconnections is recovered to save ener gy, Adiabatic circuits are based on efficient charge recovery logic (E CRL) and are integrated using 0.8 mu m complimentary metal-oxide-semic onductor (CMOS) technology, Measurement results show that power consum ption of the core is significantly reduced by a factor of up to 3.5 co mpared with a conventional circuit.