MEASUREMENT OF INTERFACE-TRAP STATES IN METAL-FERROELECTRIC-SILICON HETEROSTRUCTURES

Interface trap density distributions within Si for metal-bismuth titan ate-silicon capacitors fabricated by chemical solution deposition were investigated. The interface trap density was measured by a conductanc e technique at room temperature and a value in the order of 10(11)-10( 12) eV(-1) cm(-2) was found depending on the ferroelectric crystalliza tion temperature. An increase in the annealing temperature results in an increase in the interface trap density. (C) 1998 American Institute of Physics.