EFFECTS OF POSTANNEALING ON DIELECTRIC-PROPERTIES OF (BA, SR)TIO3 THIN-FILMS PREPARED BY LIQUID SOURCE CHEMICAL-VAPOR-DEPOSITION

The post-annealing process has been investigated for (Ba, Sr)TiO3 [BST ] thin films employed as a capacitor dielectric in 1 Gbit dynamic rand om access memories (DRAMs). The effects of post-annealing on morpholog y, crystallinity, and dielectric properties were examined for thin fil m capacitors with BST prepared on Pt electrodes by liquid source chemi cal vapor deposition (CVD). The direct annealing of BST capacitors cau sed a roughening in surface morphology of the upper Pt electrodes and BST films. However. the post-annealing of capacitors with a silicon di oxide passivation layer was found to cause little change in surface mo rphology of Pt and BST, and also no significant deterioration in leaka ge current. The improvement in crystallinity of BST films through post -annealing was confirmed at a temperature in the range 700-850 degrees C by X-ray diffraction (XRD) and transmission electron microscope (TE M). Moreover, the post-annealing experiments for BST films with differ ent compositions showed that the post-annealing greatly increases the dielectric constant of BST films having approximately stoichiometric c omposition. The leakage and breakdown properties of BST films were als o examined, indicating that excess Ti ions result in an increase of th e rum-on voltage and the breakdown time. Based on these investigations , the electrical properties of dielectric constant epsilon 260, equiva lent silicon dioxide thickness t(eq) approximate to 0.44 nm, and leaka ge current J(L) approximate to 1x10(-7) A/cm(2) at 1.9 V were successf ully obtained for stoichiometric 30-nm-thick BST films post-annealed a t 750 degrees C. Hence, it can be concluded that the post-annealing is a promising technique to enhance the applicability of CVD-deposited B ST films with conformal coverage to memory cell capacitors of 1 Gbit D RAMs.