Threshold voltage and subthreshold swing were used to study the effect
of potential developed at source and drain junctions on gate oxide da
mage during plasma processing-induced wafer charging. During substrate
injection, when the junctions are reverse-biased, the damage is highe
r. On the other hand, during gate injection the gate oxide damage is s
ignificantly reduced once the source and drain junctions become forwar
d-biased. Hot carrier lifetime measurements also confirm this behaviou
r.