NEW INSIGHT INTO THE DEGRADATION MECHANISM OF NITRIDE SPACER WITH DIFFERENT POST-OXIDE IN SUBMICRON LDD N-MOSFETS

In this paper, the hot carrier degradation mechanisms in lightly-doped drain (LDD) n-MOS devices with silicon nitride spacer have been inves tigated. A low temperature chemical vapor deposited (CVD) SiO2 oxide i s used as a post-oxide between source/drain surface and the nitride sp acer. The gated-diode measurement in combination with the gate-induced drain leakage (GIDL) current measurement techniques have been used to analyze the stress-induced interface state and oxide charges. For the first time, it was found that the oxide charge but not the interface state generation in the post oxide will dominate the device drain curr ent degradation. Moreover, the CVD post oxide with N-2 annealing has b een proposed which is able to effectively suppress the generation of o xide charges and significantly improve the device hot carrier reliabil ity. The scaling of gate oxide thickness and the optimization of sourc e/drain junction to improve the device reliability are also demonstrat ed.