HIGH-PERFORMANCE 0.2-MU-M DUAL-GATE COMPLEMENTARY MOS TECHNOLOGIES BYSUPPRESSION OF TRANSIENT-ENHANCED-DIFFUSION USING RAPID THERMAL ANNEALING

Rapid thermal annealing (RTA) before the low temperature process is in troduced in the 0.2 mu m dual gate complementary metal oxide semicondu ctor (CMOS) process and its effect has been systematically investigate d. Channel profiles of boron and phosphorus remain steep by the additi onal RTA process before gate oxidation, as seen by using secondary ion mass spectrometry and a simulation with the point defect based diffus ion model. The most effective temperature to suppress transient-enhanc ed-diffusion (TED) is 900-1000 degrees C, Which can be remarkably supp ressed by a 30 s treatment in the case of 900 degrees C RTA. A steep c hannel profile decreases the threshold voltage and increases the trans conductance. Shallow source/drain extension profiles of BF2 and phosph orus can be fabricated by an additional RTA process before sidewall sp acer film deposition, which can improve the threshold voltage lowering . Consequently, a high current drivability of a 0.2 mu m CMOS has been achieved by the suppression of TED using two additional RTA processes .