FABRICATION OF TWIN NANO SILICON WIRES BASED ON ARSENIC DOPANT EFFECT

This paper reports a simple fabrication process of Si ''twin nano wire s'' based on As dopant effect which gives rise to a significant increa se of the oxidation rate at the peak concentration of As. The processi ng procedures consist of As doping, deposition of silicon nitride laye r, electron beam lithography, reactive ion etching, wet oxide and depo sition of polysilicon. The resulting Si ''twin nano wires': have a sma ll top wire with a dimension of 10 nm and a triangular channel wire wi th a height of 250 nm. A possible application of the ''twin nano wires '' to a future single-electron memory device on silicon on insulator ( SOI) wafer is also discussed.