COMPLETE PIPELINED PARALLEL CORDIC ARCHITECTURE FOR MOTION ESTIMATION

ln this paper, a novel fully pipelined parallel CORDIC architecture is proposed for motion estimation. Unlike other block matching structure s, it estimates motion in the discrete cosine transform (DCT) transfor m domain instead of the spatial domain, As a result, it achieves high system throughput and low hardware complexity as compared to the conve ntional motion estimation design in MPEG standards. That makes the pro posed architecture very attractive in real-time high-speed video commu nication. Importantly, the DCT-based nature enables us not only to eff iciently combine DCT and motion estimation units into a single compone nt but also to replace all multiply-and-add operations in plane rotati on by CORDICs to gain further savings in hardware complexity. Furtherm ore this multiplier-free architecture is regular, modular, and has sol ely local connection suitable for VLSI implementation, The goal of the paper is to provide a solution for MPEG compatible video codec design on a dedicated single chip.